1. Field of the Invention
The present invention relates to a small digital time division switching arrangement and, more particularly, to a small digital time division switching arrangement comprising a pair of cooperating processors and a time slot interchanging arrangement capable of, inter alia, implementing the establishment and disassembly of a call by monitoring control signals and generating appropriate control signals during the progress of a two-way call for transmission in the appropriate direction.
2. Description of the Prior Art
In time division multiplexed (TDM) communication systems, samples from a plurality of voice or data channels are interspersed in time as, for example, found in the well-known pulse code modulation (PCM) systems. In a typical PCM system, the instantaneous amplitude of the voice or data signal is sampled at the Nyquist rate and each analog sample is encoded to produce a digitized sample which is interleaved in a cyclical manner with digitized samples from other channels of the same system for transmission to the desired destination. Since all digitized samples may not be destined for a single ultimate terminating station, an intermediate switching point is desirable which will switch each of the interleaved digitized samples from any one of the incoming PCM channels to any one of the interleaved digitized sample sequences transmitted via any one of the outgoing PCM channels.
To implement the rearrangement and interleaving of digitized sample sequences in the switching arrangement, time slot interchangers have been utilized which include a form of shift register arrangement wherein a controller activates gates to steer time slot unit signals in an input sequence from a certain input shift register location to a predetermined output location. A typical prior art time slot interchanger is disclosed in, for example, U.S. Pat. No. 3,770,895 issued to R. S. Krupp et al. on Nov. 6, 1973.
A modular switching system which transfers bits propagating on TDM transmission lines to appropriate time slots of a particular output trunk group using a time slot interchanger is disclosed in U.S. Pat. No. 3,678,205 issued to G. Cohen et al. on July 18, 1972. To implement the time slot interchange, data appearing at each incoming channel is transferred into a data memory system at a location assigned to a particular channel and time slot therein. During each time slot in the appropriate output channel, the data to be transmitted therein is read out of the channel memory system using the address previously stored in a connection and address memory. The address stored in the connection and address memory can be updated using commands from a control computer.
U.S. Pat. No. 3,796,835 issued to F. H. Closs et al. on Mar. 12, 1974 discloses a switching system for TDM data capable of transmitting voice or high speed data, and signalling information or low speed data between a plurality of stations by employing an asynchronous submultiplex channel for the low speed data transmission. In the system, incoming highways are cyclically scanned and the signals in each time slot are stored in separate arbitrary locations of an information storage means as determined by an address storage means. The information storage means is then cyclically accessed for read out of the interleaved and rearranged time slots.
The prior art switching arrangements merely provide the capability of switching time slots from one system to another without responding to signalling bits which may be included in the received signals and request some special service. Although very large machines may provide such capability, the problem remaining is to provide a small digital time division switching arrangement which will interface with a plurality of TDM systems to provide simultaneous switching of a plurality of input channels to a plurality of output channels while communicating with a variety of signalling circuits at remote points by appropriately interspersing desired control signals.